Precision RTL Plus
Siemens’ flagship FPGA synthesis solution offering advanced optimizations, debug & validation technologies, and tight integration with the Siemens FPGA flow. It provides several unique features that enable every designer to reach design closure faster with a user-friendly validation environment.
Catapult High-Level Synthesis and Verification
The broadest portfolio of hardware design solutions for C++ and SystemC-based
High-Level Synthesis (HLS). Catapult's physically-aware, multi-VT mode, with
Low-Power estimation and optimization, plus a range of leading Verification
solutions make HLS from Siemens more than just "C to RTL".