Aprisa digital place-and-route platform for top-level hierarchical design and block-level physical implementation for complex digital ICs.
Calibre Design Solutions delivers a complete IC verification and DFM optimization EDA platform that speeds designs from creation to manufacturing, addressing all sign-off requirements.
Industry-leading C++/SystemC High-Level Synthesis with Low-Power estimation/optimization. Design checking, code, and functional coverage verification plus formal make HLS more than mere “C-to-RTL."
Complete environment for full custom IC, MEMS, and photonic design.
Oasys-RTL provides better quality results by enabling physical accuracy, floorplanning, and fast optimization iterations to get to design closure on time.
PowerPro is a complete RTL low-power development platform that enables RTL designers to find sources of wasted power and meet design power budgets.
Precision Synthesis offers high-quality results, industry-unique features, and integration across Siemens EDA’s FPGA flow – the industry’s most comprehensive FPGA vendor-independent solution.
Solutions for IC test, operations, and functional monitoring help ensure quality, yield, and reliability across the silicon lifecycle.